CEVA-SAS IP for Enterprise Storage Systems
CEVA SAS solution
The enterprise storage industry remains heavily committed to the SCSI protocol. With ever-increasing requirements for higher performance, the enterprise storage market is rapidly evolving from SAS2.0 to SAS3.0, doubling the line rate to 12Gbps.
The CEVA-SAS 3.0 Controller IP provides both Target and Initiator functionality. It supports a rich set of features including SCSI SBC-2 End-to-End Protection (DIF), high performance, full duplex DMA with IEEE 1212.1 Scatter/Gather, narrow and wide port support, programmable Initiator address range to support virtual machines and many more.
Reflecting the system complexities of SAS, it provides a comprehensive configuration, control and alarm / status monitoring interface with extensive metric counters and error injection facilities. With complete programmable control for Vendor Specific features, the CEVA-SAS 3.0 Controller IP enables customers to create highly differentiated and robust SAS products.
The CEVA-SAS Controller IP is suitable for deployment in ASICs, ASSPs, and also the latest generation FPGAs with embedded SERDES technology.
CEVA-SAS IP Target Applications
Target applications for CEVA-SAS Controller IP include SSDs on the Target side and NAS/ SAN/ Enterprise blade servers on the Initiator side.
| Features | Deliverables |
|---|---|
| SAS3.0 Target (SSP/SMP) and Initiator (SSP/SMP/STP) Controller IP Solutions
Flexible PHY Control Layer provides ease of integration with industry leading PHY/SERDES IP, such as Snowbush and Koolchip Supports SCSI SBC-2 End-to-End Protection (DIF) Full duplex DMA with IEEE 1212.1 Scatter/Gather for high throughput performance Programmable Initiator address range to support virtual machines |
Datasheet; Verilog RTL Source Code; Example Software drivers
Simulation Test Environment and User’s Guide Synthesis Guidelines Document; Example scripts for Synthesis, STA, and LEC FPGA-based Development System emulating simple SSD (for use with Target Controller IP) or Host HBA (for use with Initiator Controller IP) |
| …and many more – Download the CEVA-SAS Product Brief for more information | |
Architectural Highlights
- A comprehensive and flexible PHY Control Layer to interface to multiple PHY/SERDES options, incorporating 8B/10B coding, OOB processing, programmable Gap / Burst parameters, with support for SNW 1 2 and 3 and SAS Phy TRAIN TRAIN_DONE sequence.
- Independent clock domains on data path and control path for SoC architecture flexibility.
- Comprehensive configuration, control and alarm / status monitoring, with extensive metric counters and error injection facilities
- Designed to support both Narrow and Wide Port SAS implementations.
- Multiple optimizations implemented for high throughput performance, including flexible auto-Response options, interleaving Data with XFER_RDY/Response and Command/Task.